Dear NCKU Alums,

With 3 years experience in design and development of consumer’ device, I am currently looking for an IC design or ASIC design engineer position.

As a self-motivated engineer, I enjoy realizing concepts into physical circuits and facing new challenges as well as improving and developing new functions for applications. The following is my resume with my qualifications:

‧3 years of work experience in Digital IC design and related system development with Master EE Degree

‧Hand-on experience with designing a counts control unit: I2C slave and data counter with 1 Mhz and 10k gates

‧Strong on RTL design and optimizing designs for better area and timing efficiency with Synopsys Design Compiler, Cadence SOC Encounter and PrimeTime(STA)

‧Experience in mixed signal simulation with Nanosim and spice model simulation with HSpice

‧Hand-on skills in IC characterization and fault analysis


Please feel free to contact me at your earliest convenience if you find my skills and experience suitable for any related job opportunities among your company and connections. Thank you very much for your time and attention. I am looking forward to hearing from you.

Jim Liou,
ME2001
jinfulio@gmail.com
Tel: (408) 418-6885



Objective: Seeking a challenging position as an IC Design Engineer

Skills
． Programming: Verilog, SystemVerilog, C
． Simulator: Modelsim, Nanosim, NC-Sim, HSPICE
． CAD tools: Synopsys Design Compiler, PrimeTime (STA),Cadence SOC Encounter,
Cadence Composer-Schematic and Virtuoso
． Hardware: Agilent Logic Analyzer and LeCroy/Tektronix oscilloscope

Work Experience
API Technology Inc, Santa Clara, CA Aug. 2009 – Current
Design Engineer: Design and verification of CMOS ambient and proximity light sensor
． Achieved enhancement of 10 % area efficiency after synthesis by improving RTL modules
． Developed test plan and realized it into checking and driving tasks to validate data synchronization issues under cross-time domain
． Synthesized Verilog design using Synopsys Design Compiler and performed static timing analysis and back- annotate simulation for digital circuits
． Accomplished saving 7% area of digital circuits by performing place and route for floor plan
． Verified Verilog cell library against SPICE library of Vanguard 0.35μm with test bench for applications
． Analyzed full chip behavior for trouble shooting the quiescent current issues using Nanosim
． Characterized products by testing and collecting data with Excel-macro scripts
． Analyzed fault chips and summarized bug list to achieve a production mask with 98% yield rate


Sunext Technology, Hsinchu, Taiwan Dec. 2003 –Apr. 2006
Firmware-Servo Control Engineer: Designed servo control process ARM-Based SOC
． Performed servo modeling with Matlab to characterize the electro-mechanical integration issues and verified the signal quality on PCB with lab measurement equipment: logic analyzer and oscilloscope
． Provided workaround solutions to customers’ issues with marketing team and worked with R&D team to trouble shoot critical bugs and fix them as soon as possible
． Successfully completed the first mass production project with 97% yield rate

Education
University of Southern California (USC), Los Angeles, CA
M.S., Electrical Engineering May 2009
． Specialized in VLSI system design, computer architecture and digital signal processing

National Cheng Kung University, Tainan, Taiwan
M.S., Mechanical Engineering

Dear NCKU Alums:

I would like to upload my resume for your reference. Please feel free to contact me at your earliest convenience if you find my experience is qualified for the openings among your company or connections.

Thanks for your time and attention to my resume.

Jim Liou
ME 2001